Campbell SAT ARGOS Bedienungsanleitung PDF herunterladen (Seite 334)

ZENO

-3200 USER MANUAL

Coastal Environmental Systems (206) 682-6048 Page D-30

Unless otherwise stated, digital outputs are set high or low only when the inputs to the process toggle the

alarm state. for example, if the data range process is triggered and the digital output goes high, it will

remain high until the alarm state is untriggered. Further, the digital output will only go high again when

the alarm state is triggered again. The process output that indicates the alarm status will be set to 1 when

the inputs to the process trigger an alarm state. The process output will remain at 1 until the end of the

sample interval time. Generally, if the alarm is set and reset within the same sample interval, the

following events will occur:

 The process output will be 0 (zero) until the alarm is set

 The process output will be 1 (one) when the alarm is triggered, and it will remain so until the end of

the sample interval time

 The process output will remain 1 (one) into the next sample interval if the alarm condition still exists

 Only when the inputs to the process untrigger the alarm condition will the process output go to 0

(zero)

This means that if the alarm is set and reset within a sample interval time, the process output will be 0

until the alarm is first set, 1 from that point until the end of the sample interval, and 0 from the start of the

next sample interval.; 1 from that point until the end of the sample interval; and 0 from the start of the

next sample interval. The reason for this is that the output message will always notify the user that an

alarm has occurred within the sample interval.

3.1. Built-In-Test (BIT) Process

Inputs: None

Outputs: L1 32-bit value of the

E1 Process Error Code

Various internal system functions or user-defined processes are used to set individual bits in the global

BIT value. Up to 31 bits can be assigned in the global BIT value (the 32nd bit is used internally by the

ZENO

-3200, and is not accessible to the user). The process clears the global BIT value after it has been

read at the end of the Sample Duration.

The following list of bit flags are pre-assigned for system wide operation

1. System reset

2. Real-time clock suspect

3. Data logging memory initialized

4. Serial device communication failure

5. EEPROM suspect

6. 18-bit analog to digital converter suspect

7. 12-bit analog to digital converter suspect

8. Clock adjustment made due to temperature compensation

These flags may be OR-ed with other warnings, and flags 8 to 31 set, by user processes Data Range,

Alarm and Data Time-out.

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Campbell SAT ARGOS Bedienungsanleitung Seite 334